This register is not documented in either the G1 or VC8000D register maps and on VC8000D there is a conflict because at the same offset the VPU IP defines another register with a very different meaning. What likely happened is the HW integrator which uses only the G1 IP core added some reset/control logic at the end of the VPU map, so it makes sense to make this register RK-specific. Signed-off-by: Adrian Ratiu <adrian.ratiu@xxxxxxxxxxxxx> --- drivers/staging/media/hantro/hantro_g1_regs.h | 1 - drivers/staging/media/hantro/rk3288_vpu_hw.c | 4 +++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_g1_regs.h b/drivers/staging/media/hantro/hantro_g1_regs.h index 073b64cbe295..a482a2ba6dfe 100644 --- a/drivers/staging/media/hantro/hantro_g1_regs.h +++ b/drivers/staging/media/hantro/hantro_g1_regs.h @@ -315,7 +315,6 @@ #define G1_REG_REF_BUF_CTRL2_REFBU2_THR(x) (((x) & 0xfff) << 19) #define G1_REG_REF_BUF_CTRL2_REFBU2_PICID(x) (((x) & 0x1f) << 14) #define G1_REG_REF_BUF_CTRL2_APF_THRESHOLD(x) (((x) & 0x3fff) << 0) -#define G1_REG_SOFT_RESET 0x194 /* Post-processor registers. */ #define G1_REG_PP_INTERRUPT G1_SWREG(60) diff --git a/drivers/staging/media/hantro/rk3288_vpu_hw.c b/drivers/staging/media/hantro/rk3288_vpu_hw.c index 7b299ee3e93d..4ad578b1236e 100644 --- a/drivers/staging/media/hantro/rk3288_vpu_hw.c +++ b/drivers/staging/media/hantro/rk3288_vpu_hw.c @@ -13,6 +13,8 @@ #include "hantro_g1_regs.h" #include "hantro_h1_regs.h" +#define VDPU_REG_SOFT_RESET 0x194 + #define RK3288_ACLK_MAX_FREQ (400 * 1000 * 1000) /* @@ -167,7 +169,7 @@ static void rk3288_vpu_dec_reset(struct hantro_ctx *ctx) vdpu_write(vpu, G1_REG_INTERRUPT_DEC_IRQ_DIS, G1_REG_INTERRUPT); vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); - vdpu_write(vpu, 1, G1_REG_SOFT_RESET); + vdpu_write(vpu, 1, VDPU_REG_SOFT_RESET); } /* -- 2.28.0
