Hi Mauro.
Laurent and I discussed this driver a little on irc.
Some highlights:
This parts could use register names:
+ writel(0x2, noc_dss_base + 0xc);
+ writel(0x2, noc_dss_base + 0x8c);
+ writel(0x2, noc_dss_base + 0x10c);
+ writel(0x2, noc_dss_base + 0x18c);
The two nodes in the DT for DPE and DSI uses overlapping range for reg
entries. It looks like a syscon node or some iommu thing is needed to do
this properly.
The chain will lok like this:
DPE -> DSI -> video mux -> {adv7533, panel}
But drm_bridge has not yet support for such non-linear setup.
The recommendation is to focus on the HDMI prat. Then we can later
come up with support for a video mux.
The video mux should have a dedicated node with one input node and two
output nodes. Which is also where the gpio should be.
The DSI node references two DPHY instances - should it be PHY driver(s)?
Does the DSI part contain one or two instances. Clocks looks duplicated.
Does the DPE and DSI share a lot of register blocks - or does it just
look like this from a first point of view?
You can read though the logs here:
https://people.freedesktop.org/~cbrill/dri-log/index.php
Could you please try to get back on some of the points above so we can
help you move forward in the right direction.
Thanks,
Sam
