[PATCH 04/10] edid-decode: add front porch, pulse width, and back porch

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For detailed timings, add front porch, pulse width, and back porch numbers in parenthesis (smaller integers are easier to comprehend, useful when comparing or editing timings in SwitchResX or other custom timing editors, negative values will be more apparent - this can happen for back porch when offset and width exceed total blanking).
Also, add missing VertFreq and HorFreq values to DisplayID type 1 timings.

Signed-off-by: Joe van Tunen <joevt@xxxxxxx>
---
 edid-decode.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/edid-decode.c b/edid-decode.c
index e1386ce..b833178 100644
--- a/edid-decode.c
+++ b/edid-decode.c
@@ -1083,14 +1083,14 @@ static int detailed_block(const unsigned char *x, int in_extension)
 	hor_mm = x[12] + ((x[14] & 0xf0) << 4);
 	vert_mm = x[13] + ((x[14] & 0x0f) << 8);
 	printf("Detailed mode: Clock %.3f MHz, %u mm x %u mm\n"
-	       "               %4u %4u %4u %4u hborder %u\n"
-	       "               %4u %4u %4u %4u vborder %u\n"
+	       "               %4u %4u %4u %4u (%3u %3u %3d) hborder %u\n"
+	       "               %4u %4u %4u %4u (%3u %3u %3d) vborder %u\n"
 	       "               %chsync %cvsync%s%s %s\n"
 	       "               VertFreq: %.3f Hz, HorFreq: %.3f kHz\n",
 	       pixclk_khz / 1000.0,
 	       hor_mm, vert_mm,
-	       ha, ha + hso, ha + hso + hspw, ha + hbl, hborder,
-	       va, va + vso, va + vso + vspw, va + vbl, vborder,
+	       ha, ha + hso, ha + hso + hspw, ha + hbl, hso, hspw, hbl - hso - hspw, hborder,
+	       va, va + vso, va + vso + vspw, va + vbl, vso, vspw, vbl - vso - vspw, vborder,
 	       phsync, pvsync, syncmethod, x[17] & 0x80 ? " interlaced" : "", stereo,
 	       refresh, (float)pixclk_khz / (ha + hbl)
 	      );
@@ -2563,13 +2563,15 @@ static void parse_displayid_detailed_timing(const unsigned char *x)
 	vspw++;
 	
 	printf("  Detailed mode: Clock %.3f MHz, %u mm x %u mm\n"
-	       "                 %4u %4u %4u %4u\n"
-	       "                 %4u %4u %4u %4u\n"
-	       "                 %chsync %cvsync\n",
+	       "                 %4u %4u %4u %4u (%3u %3u %3d)\n"
+	       "                 %4u %4u %4u %4u (%3u %3u %3d)\n"
+	       "                 %chsync %cvsync\n"
+	       "                 VertFreq: %.3f Hz, HorFreq: %.3f kHz\n",
 	       (float)pix_clock/100.0, 0, 0,
-	       ha, ha + hso, ha + hso + hspw, ha + hbl,
-	       va, va + vso, va + vso + vspw, va + vbl,
-	       phsync, pvsync
+	       ha, ha + hso, ha + hso + hspw, ha + hbl, hso, hspw, hbl - hso - hspw,
+	       va, va + vso, va + vso + vspw, va + vbl, vso, vspw, vbl - vso - vspw,
+	       phsync, pvsync,
+	       ((float)pix_clock * 10000.0) / ((ha + hbl) * (va + vbl)), ((float)pix_clock * 10.0) / (ha + hbl)
 	      );
 }
 
-- 
2.21.0 (Apple Git-122.2)




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