Hi Benoit,
good catch. I wonder why those power down/up sequences where only
set for this mode...
I also wonder which kind of power down mode do we enter, if the chip
is set in 'software power down mode' with 0x3008=0x42 at the beginning
of the register blob write sequence, and we still can successfully
program registers..
In any case, assuming 720p still works:
Reviewed-by: Jacopo Mondi <jacopo@xxxxxxxxxx>
Thanks
j
On Wed, Oct 02, 2019 at 08:51:33AM -0500, Benoit Parrot wrote:
> In the 1920x1080 register array an extra pair of reset ctrl disable
> re-enable was causing unwanted init delays.
>
> Signed-off-by: Benoit Parrot <bparrot@xxxxxx>
> ---
> drivers/media/i2c/ov5640.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c
> index 5198dc887400..103a4e8f88e1 100644
> --- a/drivers/media/i2c/ov5640.c
> +++ b/drivers/media/i2c/ov5640.c
> @@ -492,7 +492,6 @@ static const struct reg_value ov5640_setting_720P_1280_720[] = {
> };
>
> static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
> - {0x3008, 0x42, 0, 0},
> {0x3c07, 0x08, 0, 0},
> {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
> {0x3814, 0x11, 0, 0},
> @@ -520,7 +519,7 @@ static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
> {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
> {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
> {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
> - {0x4005, 0x1a, 0, 0}, {0x3008, 0x02, 0, 0},
> + {0x4005, 0x1a, 0, 0},
> };
>
> static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
> --
> 2.17.1
>
Attachment:
signature.asc
Description: PGP signature
