Hi,
On Thu, Sep 12, 2019 at 07:51:29PM +0200, Jernej Skrabec wrote:
> Both, H3 and H5, contain MBUS, which is the bus used by DMA devices to
> access system memory.
>
> MBUS controller is responsible for arbitration between channels based
> on set priority and can do some other things as well, like report
> bandwidth used. It also maps RAM region to different address than CPU.
>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@xxxxxxxx>
> ---
> arch/arm/boot/dts/sunxi-h3-h5.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> index eba190b3f9de..ef1d03812636 100644
> --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> @@ -109,6 +109,7 @@
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <1>;
> + dma-ranges;
> ranges;
>
> display_clocks: clock@1000000 {
> @@ -538,6 +539,14 @@
> };
> };
>
> + mbus: dram-controller@1c62000 {
> + compatible = "allwinner,sun8i-h3-mbus";
> + reg = <0x01c62000 0x1000>;
> + clocks = <&ccu 113>;
> + dma-ranges = <0x00000000 0x40000000 0xc0000000>;
> + #interconnect-cells = <1>;
> + };
> +
If that's easy enough to access, can you also add the references in
the devices that are already there? (CSI and DE comes to my mind, but
there might be others).
Thanks!
Maxime
