Hi Lubomir,
On Sun, May 05, 2019 at 04:00:24PM +0200, Lubomir Rintel wrote:
> The commit 05fed81625bf ("[media] marvell-ccic: add MIPI support for
> marvell-ccic driver") that claimed to add CSI2 turned on C0_EOF_VSYNC for
> parallel bus without a very good explanation.
>
> That broke camera on OLPC XO-1.75 which precisely uses a sensor on a
> parallel bus. Revert that chunk.
>
> Tested on an OLPC XO-1.75.
>
> Fixes: 05fed81625bf755cc67c5864cdfd18b69ea828d1
Use the proper fixes format here
Fixes: 05fed81625bf ("[media] marvell-ccic: add MIPI support for marvell-ccic driver")
I have this simple entry in my git config:
[pretty]
fixes = Fixes: %h (\"%s\")
With
abbrev=12
in the [core] section.
You can now
$git show 05fed81625bf755cc67c5864cdfd18b69ea828d1 --pretty=fixes
> Signed-off-by: Lubomir Rintel <lkundrak@xxxxx>
> ---
> drivers/media/platform/marvell-ccic/mcam-core.c | 6 ------
> 1 file changed, 6 deletions(-)
>
> diff --git a/drivers/media/platform/marvell-ccic/mcam-core.c b/drivers/media/platform/marvell-ccic/mcam-core.c
> index d97f39bde9bd6..d24e5b7a3bc52 100644
> --- a/drivers/media/platform/marvell-ccic/mcam-core.c
> +++ b/drivers/media/platform/marvell-ccic/mcam-core.c
> @@ -792,12 +792,6 @@ static void mcam_ctlr_image(struct mcam_camera *cam)
> * Make sure it knows we want to use hsync/vsync.
> */
> mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, C0_SIFM_MASK);
> - /*
> - * This field controls the generation of EOF(DVP only)
> - */
> - if (cam->bus_type != V4L2_MBUS_CSI2_DPHY)
> - mcam_reg_set_bit(cam, REG_CTRL0,
> - C0_EOF_VSYNC | C0_VEDGE_CTRL);
This change seems in facts unrelated to the original patch. As you
remove all usages of C0_EOF_VSYNC and C0_VEDGE_CTRL you can drop their
definition in mcam-core.h.
As I've said, the change seems unrelated to CSI-2 support and could
probably be salfey dropped, but pay attention, you're also dropping
C0_VEDGE_CTRL, which seems to enable VSYNC detection on the signal
falling edge. Is this intentional ?
Thanks
j
> }
>
>
> --
> 2.21.0
>
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