According to pages 188 and 193 of the "UG-747: ADV7481 Reference Manual" [1], the bit 7 (FRAMENUMBER_INTERLACED) of the register csi_tx_top_reg_1f "sets association of frame number in the FS and FE packets with the F bit in the EAV/SAV codes". EAV/SAV codes are defined in [2]. According to [2]: F=0 for field 1 F=1 for field 2 The bit FRAMENUMBER_INTERLACED is not initialized anywhere in the current version of the adv748x driver and therefore it is always 0, which is the default value according to [1]. Therefore the current association of field number from EAV/SAV code with the frame number in CSI FS and FE packets is: field 1 (top field for PAL, bottom field for NTSC) -> CSI frame number 2 field 2 (bottom field for PAL, top field for NTSC) -> CSI frame number 1 But this breaks frame number based field detection of top/bottom fields in CSI receivers. Therefore it makes sense to initialize the FRAMENUMBER_INTERLACED bit to 1 so the association is as expected: field 1 -> frame number 1 field 2 -> frame number 2 [1] https://www.analog.com/en/products/adv7481.html [2] https://www.itu.int/rec/R-REC-BT.656-5-200712-I/en Suggested-by: Steve Longerbeam <steve_longerbeam@xxxxxxxxxx> Signed-off-by: Michael Rodin <mrodin@xxxxxxxxxxxxxx> --- drivers/media/i2c/adv748x/adv748x-core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/media/i2c/adv748x/adv748x-core.c b/drivers/media/i2c/adv748x/adv748x-core.c index f57cd77..4dd1a13 100644 --- a/drivers/media/i2c/adv748x/adv748x-core.c +++ b/drivers/media/i2c/adv748x/adv748x-core.c @@ -278,6 +278,9 @@ static int adv748x_power_up_tx(struct adv748x_csi2 *tx) usleep_range(1000, 1500); adv748x_write_check(state, page, 0x31, 0x80, &ret); + /* set bit 7 (FRAMENUMBER_INTERLACED) in csi_tx_top_reg_1f */ + adv748x_write_check(state, page, 0x1f, 0x80, &ret); + return ret; } -- 2.7.4
