From: Jungo Lin <jungo.lin@xxxxxxxxxxxx>
This patch adds the DT binding documentation for the shared memory
between Pass 1 unit of the camera ISP system and the co-processor
in Mediatek SoCs.
Signed-off-by: Jungo Lin <jungo.lin@xxxxxxxxxxxx>
Signed-off-by: Frederic Chen <frederic.chen@xxxxxxxxxxxx>
---
.../bindings/media/mediatek,cam_smem.txt | 32 ++++++++++++++++++++++
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek,cam_smem.txt
diff --git a/Documentation/devicetree/bindings/media/mediatek,cam_smem.txt b/Documentation/devicetree/bindings/media/mediatek,cam_smem.txt
new file mode 100644
index 0000000..d0d9c17
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek,cam_smem.txt
@@ -0,0 +1,32 @@
+Mediatek Camera ISP Pass 1 Shared Memory Device
+
+Mediatek Camera ISP Pass 1 Shared Memory Device is used to manage shared
+memory among CPU, Camera ISP Pass 1 hardware and coprocessor. The Camera
+ISP Pass 1 is a hardware unit for processing image signal from the image
+sensor. Camera ISP Pass 1 is responsible for RAW processing and 3A tuning.
+
+It is associated with a reserved memory region
+(Please see Documentation\devicetree\bindings\reserved-memory\mediatek,
+reserve-memory-cam_smem.txt) and and provides the context to
+allocate memory with dma addresses.
+
+Required properties:
+- compatible: Should be "mediatek,cam_smem"
+
+- iommus: should point to the respective IOMMU block with master port
+ as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
+ for details.
+
+- mediatek,larb: must contain the local arbiters in the current SOCs, see
+ Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
+ for details.
+
+Example:
+ cam_smem: cam_smem {
+ compatible = "mediatek,cam_smem";
+ mediatek,larb = <&larb3>,
+ <&larb6>;
+ iommus = <&iommu M4U_PORT_CAM_LSCI0>,
+ <&iommu M4U_PORT_CAM_LSCI1>,
+ <&iommu M4U_PORT_CAM_BPCI>;
+ };
--
1.9.1
