From: Jungo Lin <jungo.lin@xxxxxxxxxxxx> This patch adds DT binding document for the Pass 1 (P1) unit in Mediatek's camera ISP system. The Pass 1 unit grabs the sensor data out from the sensor interface, applies ISP effects and writes the image data to DRAM. Signed-off-by: Jungo Lin <jungo.lin@xxxxxxxxxxxx> Signed-off-by: Frederic Chen <frederic.chen@xxxxxxxxxxxx> --- .../bindings/media/mediatek,mt8183-camisp.txt | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-camisp.txt diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8183-camisp.txt b/Documentation/devicetree/bindings/media/mediatek,mt8183-camisp.txt new file mode 100644 index 0000000..ba16b4e --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mt8183-camisp.txt @@ -0,0 +1,59 @@ +* Mediatek Image Signal Processor Pass 1 (ISP P1) + +The Pass 1 unit of Mediatek's camera ISP system grabs the sensor data out +from the sensor interface, applies ISP effects and writes the image data +to DRAM. Furthermore, Pass 1 unit has the ability to output two different +resolutions frames at the same time to increase the performance of the +camera application. + +Required properties: +- compatible: "mediatek,mt8183-camisp" for MT8183 +- reg: Must contain an entry for each entry in reg-names. +- interrupts: interrupt number to the cpu. +- iommus: should point to the respective IOMMU block with master port + as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt + for details. +- power-domains : a phandle to the power domain of this local arbiter. +- mediatek,smi : a phandle to the smi_common node. +- clocks: device clocks, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. +- clock-names: must be "CAMSYS_CAM_CGPDN" and "CAMSYS_CAMTG_CGPDN". +- mediatek,larb: must contain the local arbiters in the current SOCs, see + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + for details. +- mediatek,vpu : the node of video processor unit +- smem_device : the shared memory device managing the shared memory between + Pass 1 unit and the video processor unit + +Example: + camisp: camisp@1a000000 { + compatible = "mediatek,mt8183-camisp", "syscon"; + reg = <0 0x1a000000 0 0x1000>, + <0 0x1a003000 0 0x1000>, + <0 0x1a004000 0 0x2000>, + <0 0x1a006000 0 0x2000>; + reg-names = "camisp", + "cam1", + "cam2", + "cam3"; + interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 254 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 255 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "cam1", + "cam2", + "cam3"; + iommus = <&iommu M4U_PORT_CAM_LSCI0>, + <&iommu M4U_PORT_CAM_LSCI1>, + <&iommu M4U_PORT_CAM_BPCI>; + #clock-cells = <1>; + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>; + /* Camera CCF */ + clocks = <&camsys CLK_CAM_CAM>, + <&camsys CLK_CAM_CAMTG>; + clock-names = "CAMSYS_CAM_CGPDN", + "CAMSYS_CAMTG_CGPDN"; + mediatek,larb = <&larb3>, + <&larb6>; + mediatek,vpu = <&vpu>; + smem_device = <&cam_smem>; + }; -- 1.9.1