This patch adds nodes for Digital Image Processing (DIP). DIP is
embedded in Mediatek SoCs and works with the co-processor to
adjust image content according to tuning input data. It also provides
image format conversion, resizing, and rotation features.
Signed-off-by: Frederic Chen <frederic.chen@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index fff67c4..19b2c13 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -377,6 +377,29 @@
#clock-cells = <1>;
};
+ dip_smem: dip_smem {
+ compatible = "mediatek,dip_smem";
+ mediatek,larb = <&larb5>;
+ iommus = <&iommu M4U_PORT_CAM_IMGI>;
+ };
+
+ dip: dip@15022000 {
+ compatible = "mediatek,mt8183-dip";
+ mediatek,larb = <&larb5>;
+ mediatek,mdp3 = <&mdp_rdma0>;
+ mediatek,vpu = <&vpu>;
+ iommus = <&iommu M4U_PORT_CAM_IMGI>;
+ reg = <0 0x15022000 0 0x6000>;
+ interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_LOW>;
+ clocks =
+ <&imgsys CLK_IMG_LARB5>,
+ <&imgsys CLK_IMG_DIP>;
+ clock-names =
+ "DIP_CG_IMG_LARB5",
+ "DIP_CG_IMG_DIP";
+ smem_device = <&dip_smem>;
+ };
+
vdecsys: syscon@16000000 {
compatible = "mediatek,mt8183-vdecsys", "syscon";
reg = <0 0x16000000 0 0x1000>;
--
1.9.1
