On Tue, Dec 18, 2018 at 05:03:17PM +0530, Jagan Teki wrote: > Unfortunately A64 CSI cannot work with default CSI_SCLK rate. > > A64 BSP is using 300MHz clock rate as default csi clock, > so sun6i_csi require explicit change to update CSI_SCLK > rate to 300MHZ for A64 SoC's. > > So, set the clk_mod to 300MHz only for A64. > > Signed-off-by: Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx> > --- > drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c > index 9ff61896e4bb..91470edf7581 100644 > --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c > +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c > @@ -822,6 +822,11 @@ static int sun6i_csi_resource_request(struct sun6i_csi_dev *sdev, > return PTR_ERR(sdev->clk_mod); > } > > + /* A64 require 300MHz mod clock to operate properly */ > + if (of_device_is_compatible(pdev->dev.of_node, > + "allwinner,sun50i-a64-csi")) > + clk_set_rate_exclusive(sdev->clk_mod, 300000000); > + If you're using clk_set_rate_exclusive, you need to put back the "exclusive" reference once you're not using the clock. Doing it here is not really optimal either, since you'll put a constraint on the system (maintaining that clock at 300MHz), while it's not in use. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Attachment:
signature.asc
Description: PGP signature
