On Thu, 15 Nov 2018 15:50:03 +0100, Paul Kocialkowski wrote: > This introduces new bindings for the H5 SoC in the SRAM controller. > Because the SRAM layout is different from other SoCs, no backward > compatibility is assumed with any of them. > > However, the C1 SRAM section alone looks similar to previous SoCs, > so it is compatible with the initial A10 binding. > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@xxxxxxxxxxx> > --- > Documentation/devicetree/bindings/sram/sunxi-sram.txt | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
