Hello, On Monday, 15 October 2018 22:01:21 EEST Niklas Söderlund wrote: > On 2018-10-15 18:37:40 +0100, Kieran Bingham wrote: > >>> diff --git > >>> a/Documentation/devicetree/bindings/media/i2c/maxim,max9286.txt > >>> b/Documentation/devicetree/bindings/media/i2c/maxim,max9286.txt > >>> new file mode 100644 > >>> index 000000000000..a73e3c0dc31b > >>> --- /dev/null > >>> +++ b/Documentation/devicetree/bindings/media/i2c/maxim,max9286.txt > >>> @@ -0,0 +1,182 @@ > >>> +Maxim Integrated Quad GMSL Deserializer > >>> +--------------------------------------- > >>> + > >>> +The MAX9286 deserializer receives video data on up to 4 Gigabit > >>> Multimedia > >>> +Serial Links (GMSL) and outputs them on a CSI-2 port using up to 4 > >>> data lanes. > >> > >> CSI-2 D-PHY I presume? > > > > Yes, that's how I've adapted the driver based on the latest bus changes. > > > > Niklas - Could you confirm that everything in VIN/CSI2 is configured to > > use D-PHY and not C-PHY at all ? > > Yes it's only D-PHY. > > >>> + > >>> +- remote-endpoint: phandle to the remote GMSL source endpoint subnode > >>> in the > >>> + remote node port. > >>> + > >>> +Required Endpoint Properties for CSI-2 Output Port (Port 4): > >>> + > >>> +- data-lanes: array of physical CSI-2 data lane indexes. > >>> +- clock-lanes: index of CSI-2 clock lane. > >> > >> Is any number of lanes supported? How about lane remapping? If you do > >> not have lane remapping, the clock-lanes property is redundant. > > > > Uhm ... Niklas? > > The MAX9286 documentation contains information on lane remapping and > support for any number (1-4) of enabled data-lanes. I have not tested if > this works in practice but the registers are there and documented :-) That's my understanding too. Clock lane remapping doesn't seem to be supported though. We could thus omit the clock-lanes property. -- Regards, Laurent Pinchart
