On Mon, Jun 25, 2018 at 03:29:43PM +0800, alanx.chiang@xxxxxxxxx wrote:
> From: "alanx.chiang" <alanx.chiang@xxxxxxxxx>
>
> The AT24 series chips use 8-bit address by default. If some
> chips would like to support more than 8 bits, the at24 driver
> should be added the compatible field for specfic chips.
>
> Provide a flexible way to determine the addressing bits through
> address-width in this patch.
>
> Signed-off-by: Alan Chiang <alanx.chiang@xxxxxxxxx>
> Signed-off-by: Andy Yeh <andy.yeh@xxxxxxxxx>
> Reviewed-by: Sakari Ailus <sakari.ailus@xxxxxxxxxxxxxxx>
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxx>
> Reviewed-by: Rajmohan Mani <rajmohan.mani@xxxxxxxxx>
> ---
> Documentation/devicetree/bindings/eeprom/at24.txt | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt
> index 61d833a..5879259 100644
> --- a/Documentation/devicetree/bindings/eeprom/at24.txt
> +++ b/Documentation/devicetree/bindings/eeprom/at24.txt
> @@ -72,6 +72,8 @@ Optional properties:
>
> - wp-gpios: GPIO to which the write-protect pin of the chip is connected.
>
> + - address-width : number of address bits (one of 8, 16).
> +
> Example:
>
> eeprom@52 {
> @@ -79,4 +81,5 @@ eeprom@52 {
> reg = <0x52>;
> pagesize = <32>;
> wp-gpios = <&gpio1 3 0>;
> + address-width = <16>;
Since we're only now adding address-width, it hasn't been needed
previously. Therefore I wouldn't add it to an example.
> };
--
Sakari Ailus
sakari.ailus@xxxxxxxxxxxxxxx
