On 01/11/2018 09:19 AM, Sakari Ailus wrote: > On Thu, Jan 11, 2018 at 08:12:11AM +0000, Hugues FRUCHET wrote: >> Hi Sakari, >> >> On 01/10/2018 11:25 PM, Sakari Ailus wrote: >>> Hi Hugues, >>> >>> On Wed, Jan 10, 2018 at 03:51:07PM +0000, Hugues FRUCHET wrote: >>>> Good news Maxime ! >>>> >>>> Have you seen that you can adapt the polarities through devicetree ? >>>> >>>> + /* Parallel bus endpoint */ >>>> + ov5640_to_parallel: endpoint { >>>> [...] >>>> + hsync-active = <0>; >>>> + vsync-active = <0>; >>>> + pclk-sample = <1>; >>>> + }; >>>> >>>> Doing so you can adapt to your SoC/board setup easily. >>>> >>>> If you don't put those lines in devicetree, the ov5640 default init >>>> sequence is used which set the polarity as defined in below comment: >>>> ov5640_set_stream_dvp() >>>> [...] >>>> + * Control lines polarity can be configured through >>>> + * devicetree endpoint control lines properties. >>>> + * If no endpoint control lines properties are set, >>>> + * polarity will be as below: >>>> + * - VSYNC: active high >>>> + * - HREF: active low >>>> + * - PCLK: active low >>>> + */ >>>> [...] >>> >>> The properties are at the moment documented as mandatory in DT binding >>> documentation. >>> >> of course, it was just to ask Maxime to check the devicetree on its >> side, the symptom observed by Maxime with hsync/vsync inversed is the >> same than the one observed if we stick to just default init sequence. > > I wonder if the driver should be changed to require hsync and vsync. These > signals won't be there at all in Bt.656 mode. > I will revisit this when pushing Bt.656 mode.