From: Tony K Nadackal <tony.kn@xxxxxxxxxxx> Bits EXYNOS4_DEC_MODE and EXYNOS4_ENC_MODE do not get cleared on software reset. These bits need to be cleared explicitly. Even though the bits in question are already cleared in interrupt service routine, the reset should also clear them in case e.g. bootloader uses the codec and leaves it in a bad state. Signed-off-by: Tony K Nadackal <tony.kn@xxxxxxxxxxx> [Updated commit message] Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@xxxxxxxxxxx> --- drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c index c784033..c72789b 100644 --- a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c +++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c @@ -21,6 +21,10 @@ void exynos4_jpeg_sw_reset(void __iomem *base) unsigned int reg; reg = readl(base + EXYNOS4_JPEG_CNTL_REG); + writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE), + base + EXYNOS4_JPEG_CNTL_REG); + + reg = readl(base + EXYNOS4_JPEG_CNTL_REG); writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); udelay(100); -- 1.9.1
