Hi Thierry, On 06/02/2017 06:02 PM, Thierry Escande wrote: > From: Abhilash Kesavan <a.kesavan@xxxxxxxxxxx> > > This patch resets the encoding and decoding register bits before doing a > soft reset. > > Signed-off-by: Tony K Nadackal <tony.kn@xxxxxxxxxxx> > Signed-off-by: Thierry Escande <thierry.escande@xxxxxxxxxxxxx> > --- > drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c > index a1d823a..9ad8f6d 100644 > --- a/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c > +++ b/drivers/media/platform/s5p-jpeg/jpeg-hw-exynos4.c > @@ -21,6 +21,10 @@ void exynos4_jpeg_sw_reset(void __iomem *base) > unsigned int reg; > > reg = readl(base + EXYNOS4_JPEG_CNTL_REG); > + writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE), > + base + EXYNOS4_JPEG_CNTL_REG); Why is it required? It would be nice if commit message explained that. > + reg = readl(base + EXYNOS4_JPEG_CNTL_REG); > writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); > > udelay(100); > -- Best regards, Jacek Anaszewski
