On Tue, 13 Oct 2009, Kuninori Morimoto wrote:
> 10 - 3 bit hsync control are same as Rev0/Rev1.
> But only rev1 can control more 3 bit for hsync.
> This patch modify this problem
>
> Signed-off-by: Kuninori Morimoto <morimoto.kuninori@xxxxxxxxxxx>
> ---
> drivers/media/video/tw9910.c | 26 +++++++++++++++++---------
> 1 files changed, 17 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/media/video/tw9910.c b/drivers/media/video/tw9910.c
> index 59158bb..a688c11 100644
> --- a/drivers/media/video/tw9910.c
> +++ b/drivers/media/video/tw9910.c
> @@ -349,6 +349,7 @@ static int tw9910_set_scale(struct i2c_client *client,
> static int tw9910_set_hsync(struct i2c_client *client,
> const u16 start, const u16 end)
> {
> + struct tw9910_priv *priv = to_tw9910(client);
> int ret;
>
> /* bit 10 - 3 */
> @@ -363,15 +364,22 @@ static int tw9910_set_hsync(struct i2c_client *client,
> if (ret < 0)
> return ret;
>
> - /* bit 2 - 0 */
> - ret = i2c_smbus_read_byte_data(client, HSLOWCTL);
> - if (ret < 0)
> - return ret;
> + /* FIXME
Why FIXME? If this is a real distinction between hardware revisions,
there's nothing to fix about that?
> + *
> + * So far only revisions 0 and 1 have been seen
> + */
> + if (1 == priv->rev) {
>
> - ret = i2c_smbus_write_byte_data(client, HSLOWCTL,
> - (ret & 0x88) |
> - (start & 0x0007) << 4 |
> - (end & 0x0007));
> + /* bit 2 - 0 */
> + ret = i2c_smbus_read_byte_data(client, HSLOWCTL);
> + if (ret < 0)
> + return ret;
> +
> + ret = i2c_smbus_write_byte_data(client, HSLOWCTL,
> + (ret & 0x88) |
> + (start & 0x0007) << 4 |
> + (end & 0x0007));
> + }
This looks like a perfect case for your mask_set():
ret = tw9910_mask_set(client, HSLOWCTL, 0x77,
(start & 7) << 4 | (end & 7));
While at it, could you also fix that typo copied from the datasheet:
s/HSGEGIN/HSBEGIN/g?
>
> return ret;
> }
> --
> 1.6.0.4
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
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