I have proposed and documented the PR_RISCV_SET_ICACHE_FLUSH_CTX flag for prctl(2) to LKML. It has been reviewed and is expected to land during the Linux version 6.9 merge window. This adds the relevant documentation from that patch. Signed-off-by: Charlie Jenkins <charlie@xxxxxxxxxxxx> --- I have proposed and documented the PR_RISCV_SET_ICACHE_FLUSH_CTX flag for prctl(2) to LKML. It has been reviewed and is expected to land during the Linux version 6.9 merge window. --- Changes in v2: - Update formatting (Alejandro) - Link to v1: https://lore.kernel.org/r/20240124-fencei_prctl-v1-1-0bddafcef331@xxxxxxxxxxxx --- man2/prctl.2 | 59 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/man2/prctl.2 b/man2/prctl.2 index f1604a7cb..32ce8474f 100644 --- a/man2/prctl.2 +++ b/man2/prctl.2 @@ -1147,6 +1147,65 @@ For further information, see the kernel source file (or .I Documentation/security/Yama.txt before Linux 4.13). +.\" prctl PR_RISCV_SET_ICACHE_FLUSH_CTX +.TP +.BR PR_RISCV_SET_ICACHE_FLUSH_CTX " (since Linux 6.9, RISC-V only)" +Enable/disable icache flushing instructions in userspace. +The context and the scope can be provided using +.I arg2 +and +.I arg3 +respectively. +When scope is set to +.B PR_RISCV_SCOPE_PER_PROCESS +all threads in the process are permitted to emit icache flushing instructions. +Whenever any thread in the process is migrated, the corresponding hart's +icache will be guaranteed to be consistent with instruction storage. +This does not enforce any guarantees outside of migration. +If a thread modifies an instruction that another thread may attempt to +execute, the other thread must still emit an icache flushing instruction +before attempting to execute the potentially modified instruction. +This must be performed by the user-space program. +.IP +In per-thread context (eg. scope is set to +.BR PR_RISCV_SCOPE_PER_THREAD ) +only the thread calling this function is permitted to emit icache flushing +instructions. +When the thread is migrated, the corresponding hart's icache will be +guaranteed to be consistent with instruction storage. +.IP +On kernels configured without SMP, this function is a nop as migrations across +harts will not occur. +.IP +The following values for +.I arg2 +can be specified: +.RS +.TP +.BR PR_RISCV_CTX_SW_FENCEI_ON " (since Linux 6.9)" +Allow fence.i in user space. +.TP +.BR PR_RISCV_CTX_SW_FENCEI_OFF " (since Linux 6.9)" +Disallow fence.i in user space. +All threads in a process will be affected when scope is set to +.BR PR_RISCV_SCOPE_PER_PROCESS . +Therefore, caution must be taken; use this flag only when you can guarantee +that no thread in the process will emit fence.i from this point onward. +.RE +.IP +The following values for +.I arg3 +can be specified: +.RS +.TP +.BR PR_RISCV_SCOPE_PER_PROCESS " (since Linux 6.9)" +Ensure the icache of any thread in this process is coherent with instruction +storage upon migration. +.TP +.BR PR_RISCV_SCOPE_PER_THREAD " (since Linux 6.9)" +Ensure the icache of the current thread is coherent with instruction storage +upon migration. +.RE .\" prctl PR_SET_SECCOMP .TP .BR PR_SET_SECCOMP " (since Linux 2.6.23)" --- base-commit: a81e893f2b9316869e6098c3a079c30a48158092 change-id: 20240124-fencei_prctl-c24da2643379 Best regards, -- Charlie Jenkins <charlie@xxxxxxxxxxxx>
