On Sun, Apr 7, 2013 at 8:48 PM, John David Anglin <dave.anglin@xxxxxxxx> wrote:
> On 7-Apr-13, at 2:39 PM, Mike Frysinger wrote:
>
>> just to be clear, the only insn you need is:
>> ble 0x100(%sr2, %r0);
>>
>> the kernel docs say sr2 holds the kernel gateway page (so i guess 0x100 is
>> a
>> known offset into that). the docs don't mention r0 that i can see, so i'm
>> guessing it's one of those "always 0" registers ?
>
>
> Yes. There is also an entry at offset 0xb0 for light-weight-syscalls.
> Currently,
> this implements an atomic CAS operation used for pthread support.
Mike (and Kyle),
For review, here are the tables as they now stand:
=====
Architecture calling conventions
Every architecture has its own way of invoking and passing arguments to
the kernel. The details for various architectures are listed in the
two tables below.
The first table lists the instruction used to transition to kernel
mode, (which might not be the fastest or best way to transition to the
kernel, so you might have to refer to the VDSO), the register used to
indicate the system call number, and the register used to return the
system call result.
arch/ABI instruction syscall # retval Notes
────────────────────────────────────────────────────────────────────
arm/OABI swi NR - a1 NR is syscall #
arm/EABI swi 0x0 r7 r1
blackfin excpt 0x0 P0 R0
i386 int $0x80 eax eax
ia64 break 0x100000 r15 r10/r8C
parisc ble 0x100(%sr2, %r0) r20 r28
sparc/32 t 0x10 g1 o0
sparc/64 t 0x6d g1 o0
x86_64 syscall rax rax
The second table shows the registers used to pass the system call argu‐
ments.
arch/ABI arg1 arg2 arg3 arg4 arg5 arg6 arg7
──────────────────────────────────────────────────────────
arm/OABI a1 a2 a3 a4 v1 v2 v3
arm/EABI r1 r2 r3 r4 r5 r6 r7
blackfin R0 R1 R2 R3 R4 R5 -
i386 ebx ecx edx esi edi ebp -
ia64 r11 r9 r10 r14 r15 r13 -
parisc r26 r25 r24 r23 r22 r21 -
sparc/32 o0 o1 o2 o3 o4 o5 -
sparc/64 o0 o1 o2 o3 o4 o5 -
x86_64 rdi rsi rdx r10 r8 r9 -
Note that these tables don't cover the entire calling convention—some
architectures may indiscriminately clobber other registers not listed
here.
=====
Cheers,
Michael
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