On Mon, Apr 1, 2013 at 10:37 AM, Mike Frysinger <vapier@xxxxxxxxxx> wrote: > On Monday 01 April 2013 03:19:43 Mike Frysinger wrote: >> for ARM OABI, there is no such padding, and the proposed example is wrong >> and will not work. >> >> for ARM EABI, the ABI requires that 64bit values be passed in register >> pairs. since the kernel people wanted to avoid an assembly trampoline to >> unpack the 64bit value with EABI, you have to call it as proposed: >> syscall(readahead, fd, _pad, high32, low32) >> >> for MIPS, only the O32 ABI has this behavior. >> >> for PPC, only the 32bit ABI has this behavior. >> >> otherwise, i don't believe anyone else does this -- they just pass things >> along in registers w/out padding. > > in random grepping of code bases (uClibc), i believe the xtensa arch also does > 64bit register pair aligning. a cursory scan of the kernel seems to back this > up. Also SuperH? For my own education: which part of the kernel sources backed this up? -- To unsubscribe from this list: send the line "unsubscribe linux-man" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
