The ColdFire 53xx family of SoCs (including 5327, 5328, 5329, 5372 and
5273) have a Chip Identification Register (CIR) that can be used to
determine the exact SoC family member. Read this at startup to report
the exact SoC type and its revision number.
Signed-off-by: Greg Ungerer <gerg@xxxxxxxxxxxxxx>
---
arch/m68k/coldfire/m53xx.c | 40 ++++++++++++++++++++++++++++++++
arch/m68k/include/asm/m53xxsim.h | 16 +++++++++++++
2 files changed, 56 insertions(+)
diff --git a/arch/m68k/coldfire/m53xx.c b/arch/m68k/coldfire/m53xx.c
index 17af5f673796..7257c6761bdf 100644
--- a/arch/m68k/coldfire/m53xx.c
+++ b/arch/m68k/coldfire/m53xx.c
@@ -25,6 +25,7 @@
#include <asm/mcfdma.h>
#include <asm/mcfwdebug.h>
#include <asm/mcfclk.h>
+#include <asm/setup.h>
/***************************************************************************/
@@ -210,6 +211,42 @@ static void __init m53xx_fec_init(void)
/***************************************************************************/
+static void __init m53xx_probe_cpu(void)
+{
+ u16 v;
+
+ v = readw(MCF_CIR);
+
+ switch (MCFCIR_PIN(v)) {
+ case MCFCIR_5327:
+ m68k_cpuname = "5327";
+ break;
+ case MCFCIR_5328:
+ m68k_cpuname = "5328";
+ break;
+ case MCFCIR_5329:
+ m68k_cpuname = "5329";
+ break;
+ case MCFCIR_5373L:
+ m68k_cpuname = "5373L";
+ break;
+ case MCFCIR_53721:
+ m68k_cpuname = "53721";
+ break;
+ case MCFCIR_5372:
+ m68k_cpuname = "5372";
+ break;
+ case MCFCIR_5372L:
+ m68k_cpuname = "5372L";
+ break;
+ case MCFCIR_5373:
+ m68k_cpuname = "5373";
+ break;
+ }
+
+ m68k_cpurevision = MCFCIR_PRN(v);
+}
+
void __init config_BSP(char *commandp, int size)
{
#if !defined(CONFIG_BOOTPARAM)
@@ -222,7 +259,10 @@ void __init config_BSP(char *commandp, int size)
memset(commandp, 0, size);
}
#endif
+
mach_sched_init = hw_timer_init;
+
+ m53xx_probe_cpu();
m53xx_clk_init();
m53xx_uarts_init();
m53xx_fec_init();
diff --git a/arch/m68k/include/asm/m53xxsim.h b/arch/m68k/include/asm/m53xxsim.h
index db3b8c684979..49e3f4f5792e 100644
--- a/arch/m68k/include/asm/m53xxsim.h
+++ b/arch/m68k/include/asm/m53xxsim.h
@@ -1246,5 +1246,21 @@
#define MCFI2C_BASE0 (0xFc058000)
#define MCFI2C_SIZE0 0x40
+/*
+ * Chip Identification.
+ */
+#define MCF_CIR 0xFC0A000A
+#define MCFCIR_PRN(x) ((x) & 0x3f) /* Chip revision */
+#define MCFCIR_PIN(x) ((x) >> 6) /* Chip ID */
+
+#define MCFCIR_5329 0x54
+#define MCFCIR_5328 0x59
+#define MCFCIR_5327 0x61
+#define MCFCIR_5373 0x65
+#define MCFCIR_53721 0x68
+#define MCFCIR_5372 0x69
+#define MCFCIR_5373L 0x6B
+#define MCFCIR_5372L 0x6C
+
/********************************************************************/
#endif /* m53xxsim_h */
--
2.25.1
