On Sun, 23 Jul 2023, Geert Uytterhoeven wrote:
First the correct ISA port address (0x3f6) is translated to the
correct MMIO address (0xff400000 + 4 * 0x3f6 = 0xff400fd8). This is
done when the platform device is declared in arch/m68k/q40/config.c
around line 288.
Then this address is passed to pata_falcon which computes the correct
MMIO addresses for the ATA task file registers in
drivers/ata/pata_falcon.c around line 168 (ap->ioaddr.altstatus_addr =
0xff400fd8 + 1 = 0xff400fd9)
The access to the hardware registers is performed in
drivers/ata/libata-sff.c which uses ioread8/iowrite8. These functions
are defined in lib/iomap.c. These functions look at the address passed
it, determine that it is an MMIO address, and pass it to readb/writeb.
This is the first error, we actually want to do an ISA I/O cycle, not
memory cycle, but being passed a pre-translated address confuses these
two functions.
arch/m68k/include/asm/io_mm.h defines inb/outb/readb/writeb etc. They
translate the provided address into the MMIO address in the Q40s
physical address space and then perform the MMIO access. This is
where the second, unnecessary, translation takes place, and the
resulting address is wrong: (0xff800000 + 1 + 4 * 0xff400fd9) &
0xffffffff = 0xfc803f65 -- and this is the address accessed when we
get the oops.
Could be related to the bug that Michael tackled here?
https://lore.kernel.org/linux-m68k/1623290683-17859-1-git-send-email-schmitzmic@xxxxxxxxx/
Looks like something was missed in commit 44b1fbc0f5f30e66 ("m68k/q40:
Replace q40ide driver with pata_falcon and falconide") in v5.14. Before,
Q40 used its own IDE driver (q40ide, CONFIG_BLK_DEV_Q40IDE).
Could be that too.
It might be a good idea to verify that IDE works in v5.13
Yes, please do.
