On Sun, 25 Jul 2021, Al Viro wrote:
... PS: FWIW, ifdefs in arch/m68k/kernel/signal.c are wrong - it's not !MMU vs. coldfire/MMU vs. classic/MMU. It's actually 68000 vs. coldfire vs. everything else. These days it's nearly correct, but only because on MMU variants of coldfire we never see exception stack frames with type other than 4 - it's controlled by alignment of kernel stack pointer on those, and it's under the kernel control, so it's always 32bit-aligned. It used to be more serious back when we had 68360 support - that's !MMU and exception stack frames are like those on 68020, unless I'm misreading their manual...
I don't claim to understand this code but CPU32 cores appear to be unsupported on either #ifdef branch: the MMU branch due to CACR and CAAR used in push_cache(), and the !MMU branch due to frame format $4 used in adjust_format(). The CPU32 Reference Manual appendix says these chips only supports control registers SFC, DFC, VBR and stack frame formats $0, $2, $C. https://www.nxp.com/files-static/microcontrollers/doc/ref_manual/CPU32RM.pdf
