On Tue, 16 Mar 2021, Mike Pavone wrote:
Timer interrupts on MVME16x and MVME17x boards are broken as the CEN and
COC bits are being inadvertently cleared when clearing the overflow
counter. This results in no timer interrupts being delivered after the
first. Initialization then hangs in calibrate_delay as the jiffies counter
is not updated. OR with current register value to preserve these bits.
Fixes: 19999a8b8782 ("m68k: mvme16x: Handle timer counter overflow")
Signed-off-by: Michael Pavone <pavone@xxxxxxxxxxxx>
Sorry about that regression.
Do you think that commit 7529b90d051e ("m68k: mvme147: Handle timer
counter overflow") has the same problem?
---
arch/m68k/mvme16x/config.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/m68k/mvme16x/config.c b/arch/m68k/mvme16x/config.c
index 30357fe4ba6c..949d3e19f79c 100644
--- a/arch/m68k/mvme16x/config.c
+++ b/arch/m68k/mvme16x/config.c
@@ -375,7 +375,7 @@ static irqreturn_t mvme16x_timer_int (int irq, void
*dev_id)
local_irq_save(flags);
out_8(PCCTIC1, in_8(PCCTIC1) | PCCTIC1_INT_CLR);
- out_8(PCCTOVR1, PCCTOVR1_OVR_CLR);
+ out_8(PCCTOVR1, in_8(PCCTOVR1) | PCCTOVR1_OVR_CLR);
clk_total += PCC_TIMER_CYCLES;
legacy_timer_tick(1);
local_irq_restore(flags);
