Re: [PATCH 0/5] Rewrite Motorola MMU page-table layout

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On Fri, Jan 31, 2020 at 12:31:39PM +0100, Peter Zijlstra wrote:
On Fri, Jan 31, 2020 at 11:18:24AM +0000, Will Deacon wrote:
+static inline pgtable_t pte_alloc_one(struct mm_struct *mm)
 {
 	struct page *page = alloc_pages(GFP_DMA, 0);
 	pte_t *pte;

Does that mean we can drop the GFP_DMA too? If so, this all ends up
looking very similar to the sun3 code wrt alloc/free and they could
probably use the same implementation (since the generic code doesn't
like out pgtable_t definition).

Many software TLB archs have limits on what memory the TLB miss handler
itself can access (chicken-egg issues), it might be this is where the
GFP_DMA comes from.

Fair enough, that sounds plausible.

I can't quickly find this in the CFV4e docs, but I'm not really reading
it carefully either.

I can't find any code under arch/m68k/ which suggests it, but for now
I guess we should stick with the old pgtable_t definition for sun3 with
a comment (and keep the GFP_DMA in for coldfire).

Will



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