Hi Michael, Op zo 10 nov. 2019 om 03:36 schreef Michael Schmitz <schmitzmic@xxxxxxxxx>:
I need to confirm this from a data book of the older (pre-fast) revisions of this chip family. but since as Kars also states, the core driver default for the 16 bit transfer size is 64k as well, I very much suspect the same behaviour for the older revisions.
According to ftp://bitsavers.informatik.uni-stuttgart.de/components/ncr/scsi/NCR53C90ab.pdf, on the NCR 53C90A programming the transfer counter to 0 also means 64k. That's the oldest data book I could find. But the Zorro driver assumes a fast variant of the chip anyway (the clock frequency is hard coded to 40 MHz), so this point is a little moot. Kind regards, Kars.
