Hi Angelo, On 01/03/18 22:32, Angelo Dureghello wrote:
This patch fixes IO access endianness, that should be big endian. If any little endian peripheral may be connected, bytes should be swapped in hardware.
I am not sure I follow your meaning here. In many cases peripheral devices will be hooked up and they are inherently little endian but there is no hardware in between that will translate the endian. It is just something that has to be dealt with at the software driver level. So do you need to make this change for specific devices you are working with? I don't see that the M5441x parts are really special or different from any of the other ColdFire (or even traditional m68k) devices we currently support. Regards Greg
--- Changes from v2: - patch reduced form 3/3 to 2/2 - isolated big endian IO read/write[w,l] to mcf5441x Signed-off-by: Angelo Dureghello <angelo@xxxxxxxx> --- arch/m68k/include/asm/io_mm.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/m68k/include/asm/io_mm.h b/arch/m68k/include/asm/io_mm.h index ed5333e87879..a1a0f870b61b 100644 --- a/arch/m68k/include/asm/io_mm.h +++ b/arch/m68k/include/asm/io_mm.h @@ -444,13 +444,29 @@ static inline void isa_delay(void) */ #define readb(addr) in_8(addr) #define writeb(val,addr) out_8((addr),(val)) +#ifdef CONFIG_M5441x +/* + * mcf5441x only accesses IO/peripheral internal memory. + */ +#define readw(addr) in_be16(addr) +#define writew(val, addr) out_be16((addr), (val)) +#else #define readw(addr) in_le16(addr) #define writew(val,addr) out_le16((addr),(val)) +#endif #endif /* !CONFIG_ISA && !CONFIG_ATARI_ROM_ISA */ +#ifdef CONFIG_M5441x +/* + * mcf5441x only accesses IO/peripheral internal memory. + */ +#define readl(addr) in_be32(addr) +#define writel(val, addr) out_be32((addr), (val)) +#else #define readl(addr) in_le32(addr) #define writel(val,addr) out_le32((addr),(val)) +#endif #define readsb(port, buf, nr) raw_insb((port), (u8 *)(buf), (nr)) #define readsw(port, buf, nr) raw_insw((port), (u16 *)(buf), (nr))
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