Also, IO bus access should be big endian, since the general rule
is to swap eventually the bytes in hardware when little endian
peripherals are connected.
Reformatted readx/writex tabs.
Signed-off-by: Angelo Dureghello <angelo@xxxxxxxx>
---
arch/m68k/include/asm/io_mm.h | 12 ++++++------
arch/m68k/mm/kmap.c | 8 ++++++++
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/m68k/include/asm/io_mm.h b/arch/m68k/include/asm/io_mm.h
index ed5333e87879..a0d44ea82c22 100644
--- a/arch/m68k/include/asm/io_mm.h
+++ b/arch/m68k/include/asm/io_mm.h
@@ -442,15 +442,15 @@ static inline void isa_delay(void)
/*
* These should be valid on any ioremap()ed region
*/
-#define readb(addr) in_8(addr)
-#define writeb(val,addr) out_8((addr),(val))
-#define readw(addr) in_le16(addr)
-#define writew(val,addr) out_le16((addr),(val))
+#define readb(addr) in_8(addr)
+#define writeb(val, addr) out_8((addr), (val))
+#define readw(addr) in_be16(addr)
+#define writew(val, addr) out_be16((addr), (val))
#endif /* !CONFIG_ISA && !CONFIG_ATARI_ROM_ISA */
-#define readl(addr) in_le32(addr)
-#define writel(val,addr) out_le32((addr),(val))
+#define readl(addr) in_be32(addr)
+#define writel(val, addr) out_be32((addr), (val))
#define readsb(port, buf, nr) raw_insb((port), (u8 *)(buf), (nr))
#define readsw(port, buf, nr) raw_insw((port), (u16 *)(buf), (nr))
diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c
index c2a38321c96d..e8ebfc44ee03 100644
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -118,6 +118,14 @@ void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cachefla
if (!size || physaddr > (unsigned long)(-size))
return NULL;
+#if defined(CONFIG_M54xx) || defined(CONFIG_M5441x)
+ /*
+ * This ColdFire models maps IO space into ACR0_MODE,
+ * so they can access IO space directly.
+ */
+ return (void __iomem *)physaddr;
+#endif
+
#ifdef CONFIG_AMIGA
if (MACH_IS_AMIGA) {
if ((physaddr >= 0x40000000) && (physaddr + size < 0x60000000)
--
2.15.1
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