On Sat, 29 Oct 2016, I wrote:
On Sun, 13 Apr 2014, David Miller wrote:
But oddly in the NCR53CX docs:
http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
it speaks as if ESP_CONFIG3_TMS and ESP_CONFIG3_TENB are merely finer
grained versions of config2 register setting ESP_CONFIG2_SCSI2ENAB,
which enables both features.
Yes, so setting the ESP_CONFIG2_SCSI2ENAB bit is correct. The only
problem is, doesn't the ESP_CONFIG3_TMS bit get cleared again later,
when the CONFIG3 register is written to?
Nevermind my question. To falsify my own theory, I see that
ESP_CONFIG3_TMS == ESP_CONFIG3_FCLK, and thus esp_scsi does actually set
the relevant bit, and therefore "the FSC can receive 3-byte messages
during businitiated select with ATN."
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