Re: [patch 1/6] hardirq: Make hardirq bits generic

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On Thu, 7 Nov 2013, Geert Uytterhoeven wrote:

Hi Thomas,

On Wed, Nov 6, 2013 at 6:23 PM, Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote:
Also note that the value of "nested" doesn't match the indentation level,
which depends on my own bookkeeping using "nesting".

Well, nested is just an indicator. It's not the nest level.

I know, the only thing that matters is whether it's zero or not.
But it should always be zero if there's no nesting, and non-zero if there
is, right?

So:

#   irq 13 nested 1024

nested should be 0 here.

#   irq 4 nested 0

ok

#     irq 13 nested 1024

ok (two extra spaces in front of "irq").

#     irq 4 nested 0

nested should be non-zero here.

Hmm. The softirq code reenables interrupts unconditionally. So when an
interrupt hits there SR on stack has the bits cleared. You could
verify that by checking in_serving_softirq() at the entry to
do_IRQ(). That could also explain the irq 4 nests in irq 4 issue. You
can't observe that on the original code as the softirq invocation and
therefor the interrupt enable happens outside of do_IRQ().

Though that does not explain the non nested case where nested is !=
0. But it looks like that irq 13 has a higher level than 4:

#     irq 13 nested 1024

ok (two extra spaces in front of "irq").

So it could actually be the following:

   irq X arrives, SR I2/1/0 is set to 4

   Now before we reach do_IRQ()
   
	irq 13 arrives and interrupts irq X as it has a higher level

   	Your nest accounting shows 0, but the SR says nested, which is
   	actually the correct state.

Is there an easy to setup/use emulator around on which I could try to
dig into that myself?

Thanks,

	tglx
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