Hi Philippe,
On 16/10/12 00:43, Philippe De Muyter wrote:
Hello Stany,
[CCing linux-m68k@xxxxxxxxxxxxxxx]
On Mon, Oct 15, 2012 at 03:37:25PM +0200, Stany MARCEL wrote:
Hello,
I have sent a patch on linuxm68k mailing list, a few minutes ago, that
permits to use your driver correctly with MMU without caching issues.
The strategy is to map a memory zone used for dma allocation as non
cachable.
Bright idea.
It is a lot better than a complete flush at each network operation, and
correct my issue of lost UDP frames.
With this and the read write operation replaced by __raw_* one Your FEC
and MCD DMA works very well for me.
Thanks for the positive feedback.
I was not aware of any difference between __raw_writel and writel on m68k.
For the non-MMU case, I see:
arch/m68k/include/asm/io_no.h:#define __raw_writel writel
but now I have found for the MMU case:
arch/m68k/include/asm/io_mm.h:#define writel(val,addr) out_le32((addr),(val))
arch/m68k/include/asm/raw_io.h:#define __raw_writel(val,addr) out_be32((addr),(val))
and I understand your problem (out_le32 vs out_be32), but I wonder:
should we not:
- try to understand/fix the difference between __raw_writel and writel in
CONFIG_MMU case (Greg, Geert ?)
Yes, I figure they should be the same (on ColdFire at least).
Typically you should use writel in a driver. From the kernels documentation,
Documentation/DocBook/deviceiobook.tmpl:
<para>
The read and write functions are defined to be ordered. That is the
compiler is not permitted to reorder the I/O sequence. When the
ordering can be compiler optimised, you can use <function>
__readb</function> and friends to indicate the relaxed ordering. Use
this with care.
</para>
Whereas __raw_writel is really raw, no ordering, no barriers, no
bye-swapping, no nothing. Just direct write of the register.
Regards
Greg
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Greg Ungerer -- Principal Engineer EMAIL: gerg@xxxxxxxxxxxx
SnapGear Group, McAfee PHONE: +61 7 3435 2888
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