On Wed, Jul 21, 2010 at 22:22, Mattias Engdegård <mattiase@xxxxxxxxxxxx> wrote:
Does anyone know whether a 68LC040 alters the address register in
postincrement/predecrement modes when it calculates the effective address
for an FP instruction? The FPU emulation in the kernel seems to assume that
it doesn't, but that doesn't really make sense.
If the 'LC040 does increment a0 in fadd.d (a0)+,fp0, say, then the Linux FPU
emulation is quite broken, at least in 2.6.34. If not, then I have
misunderstood how the hardware works.
As the 'LC040 doesn't implement FPU instructions, I'd expect it to
just generate an
exception when the "fadd.d (a0)+,fp0" is encountered. I.e. not do anything else,
like postincrementing a0.
I'm writing a 68040/68LC040 simulator and unfortunately do not have a real
'LC040 to do experiments on. If someone with actual hardware could help me,
I'd be most grateful.
Sorry, only a full '040 here.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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