Note that both 16 and 32 bit accesses will return 8 bit results only, due
to the way the address and data bus are wired on the ROM ISA adapter. I
hope this is the correct behavior.
I don't think that's correct. Shouldn't 16-bit resp. 32-bit accesses be
emulated using 2 resp. 4 8-bit accesses instead?
We could do that, but we'll have to do these repeated accesses with the
same port address, right?. It's up to the device what it makes of this -
writing four single bytes to the same port may not be the same as writing
a single 32 bit value.
Would something like this work?
#define rom_in_be16(addr) \
({ u16 __w = (*(__force volatile u16 *) (addr)); \
u16 __v = (*(__force volatile u16 *) (addr+1)); __w &= __v >> 8; __w; })
(assuming the first byte read goes into the high byte, as is natural?)
Michael
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