> +static int omnia_led_trig_offload_wan(struct omnia_leds *leds,
> + struct omnia_led *led,
> + struct led_netdev_data *trig)
> +{
> + unsigned long period;
> + int ret, blink_rate;
> + bool link, rx, tx;
> + u8 fun;
> +
> + /* HW offload on WAN port is supported only via internal PHY */
> + if (trig->net_dev->sfp_bus || !trig->net_dev->phydev)
> + return -EOPNOTSUPP;
> +
> + link = test_bit(NETDEV_LED_LINK, &trig->mode);
> + rx = test_bit(NETDEV_LED_RX, &trig->mode);
> + tx = test_bit(NETDEV_LED_TX, &trig->mode);
> +
> + if (link && rx && tx)
> + fun = 0x1;
> + else if (!link && rx && tx)
> + fun = 0x4;
> + else
> + return -EOPNOTSUPP;
> +
> + period = jiffies_to_msecs(atomic_read(&trig->interval)) * 2;
> + blink_rate = wan_led_round_blink_rate(&period);
> + if (blink_rate < 0)
> + return blink_rate;
> +
> + mutex_lock(&leds->lock);
> +
> + if (!led->phydev) {
> + led->phydev = trig->net_dev->phydev;
> + get_device(&led->phydev->mdio.dev);
> + }
> +
> + /* set PHY's LED[0] pin to blink according to trigger setting */
> + ret = phy_modify_paged(led->phydev, MII_MARVELL_LED_PAGE,
> + MII_PHY_LED_TCR,
> + MII_PHY_LED_TCR_PULSESTR_MASK |
> + MII_PHY_LED_TCR_BLINKRATE_MASK,
> + (0 << MII_PHY_LED_TCR_PULSESTR_SHIFT) |
> + (blink_rate << MII_PHY_LED_TCR_BLINKRATE_SHIFT));
> + if (ret)
> + goto unlock;
> +
> + ret = phy_modify_paged(led->phydev, MII_MARVELL_LED_PAGE,
> + MII_PHY_LED_CTRL, 0xf, fun);
> + if (ret)
> + goto unlock;
This needs to be in the Marvell PHY driver. Please add a generic
interface any PHY driver can implement to allow its LEDs to be
controlled.
Andrew
