On Mon, 2 Sep 2024 13:50:01 +0200
Christoph Schlameuss <schlameuss@xxxxxxxxxxxxx> wrote:
> Add a test case manipulating s390 storage keys from within the ucontrol
> VM.
>
> Signed-off-by: Christoph Schlameuss <schlameuss@xxxxxxxxxxxxx>
> ---
> .../selftests/kvm/s390x/ucontrol_test.c | 89 ++++++++++++++++++-
> 1 file changed, 88 insertions(+), 1 deletion(-)
>
> diff --git a/tools/testing/selftests/kvm/s390x/ucontrol_test.c b/tools/testing/selftests/kvm/s390x/ucontrol_test.c
> index 04a0d55af617..331a4109b953 100644
> --- a/tools/testing/selftests/kvm/s390x/ucontrol_test.c
> +++ b/tools/testing/selftests/kvm/s390x/ucontrol_test.c
> @@ -79,6 +79,33 @@ asm("test_mem_asm:\n"
> " j 0b\n"
> );
>
> +/* Test program manipulating storage keys */
> +extern char test_skey_asm[];
> +asm("test_skey_asm:\n"
> + "xgr %r0, %r0\n"
> +
> + "0:\n"
> + " ahi %r0,1\n"
> + " st %r1,0(%r5,%r6)\n"
> +
> + " iske %r1,%r6\n"
> + " ahi %r0,1\n"
> + " diag 0,0,0x44\n"
> +
> + " sske %r1,%r6\n"
> + " xgr %r1,%r1\n"
> + " iske %r1,%r6\n"
> + " ahi %r0,1\n"
> + " diag 0,0,0x44\n"
> +
> + " rrbe %r1,%r6\n"
> + " iske %r1,%r6\n"
> + " ahi %r0,1\n"
> + " diag 0,0,0x44\n"
> +
> + " j 0b\n"
> +);
> +
> FIXTURE(uc_kvm)
> {
> struct kvm_s390_sie_block *sie_block;
> @@ -275,8 +302,9 @@ static void uc_handle_exit_ucontrol(FIXTURE_DATA(uc_kvm) * self)
> }
>
> /* verify SIEIC exit
> - * * reset stop requests
> + * * handle expected interception codes
> * * fail on codes not expected in the test cases
> + * Returns if interception is handled / execution can be continued
> */
> static bool uc_handle_sieic(FIXTURE_DATA(uc_kvm) * self)
> {
> @@ -293,6 +321,10 @@ static bool uc_handle_sieic(FIXTURE_DATA(uc_kvm) * self)
> /* end execution in caller on intercepted instruction */
> pr_info("sie instruction interception\n");
> return false;
> + case ICPT_KSS:
> + /* disable KSS and continue; KVM would init the skeys here */
> + sie_block->cpuflags &= ~CPUSTAT_KSS;
> + return true;
> case ICPT_OPEREXC:
> /* operation exception */
> TEST_FAIL("sie exception on %.4x%.8x", sie_block->ipa, sie_block->ipb);
> @@ -449,4 +481,59 @@ TEST_F(uc_kvm, uc_gprs)
> ASSERT_EQ(1, sync_regs->gprs[0]);
> }
>
> +TEST_F(uc_kvm, uc_skey)
> +{
> + u64 test_vaddr = VM_MEM_SIZE - (SZ_1M / 2);
> + struct kvm_sync_regs *sync_regs = &self->run->s.regs;
> + struct kvm_run *run = self->run;
> + u8 skeyvalue = 0x34;
> +
> + /* copy test_skey_asm to code_hva / code_gpa */
> + TH_LOG("copy code %p to vm mapped memory %p / %p",
> + &test_skey_asm, (void *)self->code_hva, (void *)self->code_gpa);
> + memcpy((void *)self->code_hva, &test_skey_asm, PAGE_SIZE);
> +
> + /* set register content for test_skey_asm to access not mapped memory */
> + sync_regs->gprs[1] = skeyvalue;
> + sync_regs->gprs[5] = self->base_gpa;
> + sync_regs->gprs[6] = test_vaddr;
> + run->kvm_dirty_regs |= KVM_SYNC_GPRS;
> +
> + /* DAT disabled + 64 bit mode */
> + run->psw_mask = 0x0000000180000000ULL;
> + run->psw_addr = self->code_gpa;
> +
> + ASSERT_EQ(0, uc_run_once(self));
> + ASSERT_EQ(false, uc_handle_exit(self));
this should be true, since KSS will be triggered
> + ASSERT_EQ(1, sync_regs->gprs[0]);
> +
> + /* ISKE */
> + ASSERT_EQ(0, uc_run_once(self));
> + ASSERT_EQ(false, uc_handle_exit(self));
> + ASSERT_EQ(2, sync_regs->gprs[0]);
> + /* assert initial skey (ACC = 0, R & C = 1) */
> + ASSERT_EQ(0x06, sync_regs->gprs[1]);
> + uc_assert_diag44(self);
> +
> + /* SSKE */
> + sync_regs->gprs[1] = skeyvalue;
> + run->kvm_dirty_regs |= KVM_SYNC_GPRS;
> + ASSERT_EQ(0, uc_run_once(self));
> + ASSERT_EQ(false, uc_handle_exit(self));
> + ASSERT_EQ(3, sync_regs->gprs[0]);
> + ASSERT_EQ(skeyvalue, sync_regs->gprs[1]);
> + uc_assert_diag44(self);
> +
> + /* RRBE */
> + sync_regs->gprs[1] = skeyvalue;
> + run->kvm_dirty_regs |= KVM_SYNC_GPRS;
> + ASSERT_EQ(0, uc_run_once(self));
> + ASSERT_EQ(false, uc_handle_exit(self));
> + ASSERT_EQ(4, sync_regs->gprs[0]);
> + /* assert R reset but rest of skey unchanged*/
> + ASSERT_EQ(skeyvalue & 0xfa, sync_regs->gprs[1]);
> + ASSERT_EQ(0x00, sync_regs->gprs[1] & 0x04);
> + uc_assert_diag44(self);
> +}
> +
> TEST_HARNESS_MAIN
