Clang does not support implicit LMUL in the vset* instruction sequences.
Introduce an explicit LMUL in the vsetivli instruction.
Signed-off-by: Charlie Jenkins <charlie@xxxxxxxxxxxx>
Fixes: 9d5328eeb185 ("riscv: selftests: Add signal handling vector tests")
---
There is one more error that occurs when the test cases for riscv are
compiled with llvm:
ld.lld: error: undefined symbol: putchar
>>> referenced by crt.h:69 (./../../../../include/nolibc/crt.h:69)
>>> /tmp/v_initval_nolibc-5b14c8.o:(dump)
>>> referenced by crt.h:67 (./../../../../include/nolibc/crt.h:67)
>>> /tmp/v_initval_nolibc-5b14c8.o:(dump)
This is fixed in my rework of the vector tests in a different series [1]
Link: https://patchwork.kernel.org/project/linux-riscv/patch/20240619-xtheadvector-v3-12-bff39eb9668e@xxxxxxxxxxxx/ [1]
---
tools/testing/selftests/riscv/sigreturn/sigreturn.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/testing/selftests/riscv/sigreturn/sigreturn.c b/tools/testing/selftests/riscv/sigreturn/sigreturn.c
index 62397d5934f1..ed351a1cb917 100644
--- a/tools/testing/selftests/riscv/sigreturn/sigreturn.c
+++ b/tools/testing/selftests/riscv/sigreturn/sigreturn.c
@@ -51,7 +51,7 @@ static int vector_sigreturn(int data, void (*handler)(int, siginfo_t *, void *))
asm(".option push \n\
.option arch, +v \n\
- vsetivli x0, 1, e32, ta, ma \n\
+ vsetivli x0, 1, e32, m1, ta, ma \n\
vmv.s.x v0, %1 \n\
# Generate SIGSEGV \n\
lw a0, 0(x0) \n\
---
base-commit: f2661062f16b2de5d7b6a5c42a9a5c96326b8454
change-id: 20240701-fix_sigreturn_test-47d7063ac8e6
--
- Charlie
