On Tue, Jan 25, 2022 at 11:25:31AM +0000, Marc Zyngier wrote: > On Tue, 25 Jan 2022 00:10:41 +0000, > Mark Brown <broonie@xxxxxxxxxx> wrote: > > +/* HFG[WR]TR_EL2 bit definitions */ > > +#define HFGxTR_EL2_nTPIDR_EL0_SHIFT 55 > > +#define HFGxTR_EL2_nTPIDR_EL0_MASK (1 << HFGxTR_EL2_nTPIDR_EL0_SHIFT) > This annoyingly clashes with bit 35 of the same registers, which maps > to TPIDR_EL0. I have the feeling that this really should be TPIDR2_EL0. Yes, it should be.
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