On 2024/7/18 10:25, Dan Carpenter wrote:
If sg2042_get_pll_ctl_setting() fails then "value" isn't initialized and
it is printed in the debug output. Initialize it to zero.
Fixes: 48cf7e01386e ("clk: sophgo: Add SG2042 clock driver")
Signed-off-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
---
drivers/clk/sophgo/clk-sg2042-pll.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/sophgo/clk-sg2042-pll.c b/drivers/clk/sophgo/clk-sg2042-pll.c
index aa142897aa5e..24b0eab6154b 100644
--- a/drivers/clk/sophgo/clk-sg2042-pll.c
+++ b/drivers/clk/sophgo/clk-sg2042-pll.c
@@ -387,7 +387,7 @@ static int sg2042_clk_pll_set_rate(struct clk_hw *hw,
struct sg2042_pll_clock *pll = to_sg2042_pll_clk(hw);
struct sg2042_pll_ctrl pctrl_table;
unsigned long flags;
- u32 value;
+ u32 value = 0;
int ret;
spin_lock_irqsave(pll->lock, flags);
Reviewed-by: Chen Wang <unicorn_wang@xxxxxxxxxxx>
Thank you Dan.
Regards,
Chen
