On Fri, 19 Jan 2024, Dan Carpenter wrote:
> The "msg_addr" variable is u64. However, the "aligned_offset" is an
> unsigned int. This means that when the code does:
>
> msg_addr &= ~aligned_offset;
Wouldn't it be more obvious to replace the entire line with this:
msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size);
+ add the #include for it. It should handle the casting to the same type
internally.
--
i.
>
> it will unintentionally zero out the high 32 bits. Declare
> "aligned_offset" as a u64 to address this bug.
>
> Fixes: 2217fffcd63f ("PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment support")
> Signed-off-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
> ---
> v2: fix a typo in the commit message
>
> drivers/pci/controller/dwc/pcie-designware-ep.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 5befed2dc02b..2b6607c23541 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -525,7 +525,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
> struct dw_pcie_ep_func *ep_func;
> struct pci_epc *epc = ep->epc;
> u32 reg, msg_data, vec_ctrl;
> - unsigned int aligned_offset;
> + u64 aligned_offset;
> u32 tbl_offset;
> u64 msg_addr;
> int ret;
>
