On Sun, Jun 18, 2023 at 06:24:54PM +0200, Christophe JAILLET wrote:
> Group some bitfield variables to reduce hole.
> On x86_64, this shrinks the size of 'struct pci_dev' by 16 bytes when
> compiled with 'allmodconfig'. This goes from 3576 to 3560.
>
> The move related to CONFIG_PCIEASPM depends on the config. But it gives
> the opportunity to merge to bitfields.
>
> Signed-off-by: Christophe JAILLET <christophe.jaillet@xxxxxxxxxx>
Both patches applies to pci/misc for v6.6, thanks!
> ---
> include/linux/pci.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index c69a2cc1f412..106754757279 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -366,8 +366,8 @@ struct pci_dev {
> pci_power_t current_state; /* Current operating state. In ACPI,
> this is D0-D3, D0 being fully
> functional, and D3 being off. */
> - unsigned int imm_ready:1; /* Supports Immediate Readiness */
> u8 pm_cap; /* PM capability offset */
> + unsigned int imm_ready:1; /* Supports Immediate Readiness */
> unsigned int pme_support:5; /* Bitmask of states from which PME#
> can be generated */
> unsigned int pme_poll:1; /* Poll device's PME status bit */
> @@ -392,9 +392,9 @@ struct pci_dev {
>
> #ifdef CONFIG_PCIEASPM
> struct pcie_link_state *link_state; /* ASPM link state */
> + u16 l1ss; /* L1SS Capability pointer */
> unsigned int ltr_path:1; /* Latency Tolerance Reporting
> supported from root to here */
> - u16 l1ss; /* L1SS Capability pointer */
> #endif
> unsigned int pasid_no_tlp:1; /* PASID works without TLP Prefix */
> unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */
> --
> 2.34.1
>
