RE: [bug report] octeontx2-af: Add PTP PPS Errata workaround on CN10K silicon

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Hi Dan Carpenter,

Thank you for the information. I'll fix it.

Regards,
Naveen

> -----Original Message-----
> From: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
> Sent: Monday, May 22, 2023 1:18 PM
> To: Naveen Mamindlapalli <naveenm@xxxxxxxxxxx>
> Cc: kernel-janitors@xxxxxxxxxxxxxxx
> Subject: [bug report] octeontx2-af: Add PTP PPS Errata workaround on
> CN10K silicon
> 
> Hello Naveen Mamindlapalli,
> 
> The patch 2ef4e45d99b1: "octeontx2-af: Add PTP PPS Errata workaround on
> CN10K silicon" from Sep 10, 2022, leads to the following Smatch static checker
> warning:
> 
> 	drivers/net/ethernet/marvell/octeontx2/af/ptp.c:455 ptp_remove()
> 	warn: variable dereferenced before IS_ERR check 'ptp' (see line 452)
> 
> drivers/net/ethernet/marvell/octeontx2/af/ptp.c
>     447 static void ptp_remove(struct pci_dev *pdev)
>     448 {
>     449         struct ptp *ptp = pci_get_drvdata(pdev);
>     450         u64 clock_cfg;
>     451
>     452         if (cn10k_ptp_errata(ptp) && hrtimer_active(&ptp->hrtimer))
>                                      ^^^                    ^^^^
> 
>     453                 hrtimer_cancel(&ptp->hrtimer);
>                                        ^^^^ Dereferences.
> 
>     454
> --> 455         if (IS_ERR_OR_NULL(ptp))
>                                    ^^^
> Checked too late.  Hopefully this check can be removed.
> 
>     456                 return;
>     457
>     458         /* Disable PTP clock */
>     459         clock_cfg = readq(ptp->reg_base + PTP_CLOCK_CFG);
>     460         clock_cfg &= ~PTP_CLOCK_CFG_PTP_EN;
>     461         writeq(clock_cfg, ptp->reg_base + PTP_CLOCK_CFG);
>     462 }
> 
> regards,
> dan carpenter




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