On Thu, Oct 01 2020 at 10:48, Balbir Singh wrote: > On 1/10/20 9:49 am, Singh, Balbir wrote: >> >> +static void l1d_flush_kill(struct callback_head *ch) >> +{ >> + clear_ti_thread_flag(¤t->thread_info, TIF_SPEC_L1D_FLUSH); >> + force_signal(SIGBUS); >> +} >> + >> void switch_mm(struct mm_struct *prev, struct mm_struct *next, >> struct task_struct *tsk) >> { >> @@ -443,12 +438,14 @@ static void cond_mitigation(struct task_struct *next) >> } >> >> /* >> - * Flush only if SMT is disabled as per the contract, which is checked >> - * when the feature is enabled. >> + * Flush only if SMT is disabled, if flushing is enabled >> + * and we are on an SMT enabled core, kill the task >> */ >> - if (sched_smt_active() && !this_cpu_read(cpu_info.smt_active) && >> - (prev_mm & LAST_USER_MM_L1D_FLUSH)) >> - l1d_flush_hw(); >> + if (unlikely(prev_mm & LAST_USER_MM_L1D_FLUSH)) { >> + if (!this_cpu_read(cpu_info.smt_active)) >> + l1d_flush_hw(); >> + else >> + task_work_add(prev, l1d_flush_kill, true); > > We have no access the to the previous task and mm->owner depends on MEMCG :) > We can do the magic in mm_mangle_tif_spec_bits(), I suppose No, because we don't have access to prev task there either. Interesting problem to solve. Thanks, tglx