Dan Carpenter <dan.carpenter@xxxxxxxxxx> writes:
> It seems pretty clear that bitwise OR was intended here and not logical
> OR.
>
> Fixes: 6fc29133eafb ('drm/i915/gen9: Add WaDisableSkipCaching')
> Signed-off-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
Pushed to drm-intel-next-queued. Thanks for patch.
-Mika
>
> diff --git a/drivers/gpu/drm/i915/intel_mocs.c b/drivers/gpu/drm/i915/intel_mocs.c
> index 8f96c40..3c1482b 100644
> --- a/drivers/gpu/drm/i915/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/intel_mocs.c
> @@ -162,7 +162,7 @@ static bool get_mocs_settings(struct drm_i915_private *dev_priv,
>
> for (i = 0; i < table->size; i++)
> if (WARN_ON(table->table[i].l3cc_value &
> - (L3_ESC(1) || L3_SCC(0x7))))
> + (L3_ESC(1) | L3_SCC(0x7))))
> return false;
> }
>
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