> On Aug 18, 2015, at 3:57 AM, Dan Carpenter <dan.carpenter@xxxxxxxxxx> wrote:
>
> "port_sel" is a u64 so the shifting should also be a 64 bit shift.
>
> Fixes: c21e0bbfc485 ('cxlflash: Base support for IBM CXL Flash Adapter')
> Signed-off-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
>
> diff --git a/drivers/scsi/cxlflash/main.c b/drivers/scsi/cxlflash/main.c
> index 0720d2f..f97421d 100644
> --- a/drivers/scsi/cxlflash/main.c
> +++ b/drivers/scsi/cxlflash/main.c
> @@ -1179,7 +1179,7 @@ static void afu_link_reset(struct afu *afu, int port, u64 *fc_regs)
>
> /* first switch the AFU to the other links, if any */
> port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel);
> - port_sel &= ~(1 << port);
> + port_sel &= ~(1ULL << port);
> writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
> cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
>
> @@ -1196,7 +1196,7 @@ static void afu_link_reset(struct afu *afu, int port, u64 *fc_regs)
> __func__, port);
>
> /* switch back to include this port */
> - port_sel |= (1 << port);
> + port_sel |= (1ULL << port);
> writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
> cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
>
Acked-by: Matthew R. Ochs <mrochs@xxxxxxxxxxxxxxxxxx>
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