Re: [patch] [SCSI] mvsas: fix a && vs & bug

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On 08/16/2012 07:04 AM, Dan Carpenter wrote:
The "1 << (slot_idx % 32)" condition is always true.  The intent was to
test a bit field here using bitwise AND.  We do the test correctly a few
lines later in the do while loop.

Signed-off-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>

Acked-by: Jeff Garzik <jgarzik@xxxxxxxxxx>



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