scripts/Makefile.lib is included not only from scripts/Makefile.build
but also from scripts/Makefile.{vmlinux,modfinal} for building generated
C files.
In scripts/Makefile.{vmlinux,modfinal}, $(obj) and $(src) are empty.
Therefore, the header include paths:
-I $(srctree)/$(src) -I $(objtree)/$(obj)
... become meaningless code:
-I $(srctree)/ -I $(objtree)/
Add these paths only when 'obj' and 'src' are defined.
Reported-by: kernel test robot <lkp@xxxxxxxxx>
Link: https://lore.kernel.org/oe-kbuild-all/202404170634.BlqTaYA0-lkp@xxxxxxxxx/
Signed-off-by: Masahiro Yamada <masahiroy@xxxxxxxxxx>
---
Changes in v2:
- New patch to address the build error reported by 0day bot
scripts/Makefile.lib | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index d1d51e38b55d..e67f066c0cea 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -213,9 +213,9 @@ endif
# $(objtree)/$(obj) for including generated headers from checkin source files
ifeq ($(KBUILD_EXTMOD),)
ifdef building_out_of_srctree
-_c_flags += -I $(srctree)/$(src) -I $(objtree)/$(obj)
-_a_flags += -I $(srctree)/$(src) -I $(objtree)/$(obj)
-_cpp_flags += -I $(srctree)/$(src) -I $(objtree)/$(obj)
+_c_flags += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj))
+_a_flags += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj))
+_cpp_flags += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj))
endif
endif
--
2.40.1
