From: WANG Xuerui <git@xxxxxxxxxx>
LLVM/Clang does not see FCSRs as GPRs, so make use of compiler
built-ins instead for better maintainability with less code.
The existing version cannot be wholly removed though, because the
built-ins, while available on GCC too, is predicated TARGET_HARD_FLOAT,
which means soft-float code cannot make use of them.
Signed-off-by: WANG Xuerui <git@xxxxxxxxxx>
---
arch/loongarch/include/asm/loongarch.h | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/arch/loongarch/include/asm/loongarch.h b/arch/loongarch/include/asm/loongarch.h
index ac83e60c60d1..eedc313b5241 100644
--- a/arch/loongarch/include/asm/loongarch.h
+++ b/arch/loongarch/include/asm/loongarch.h
@@ -1445,12 +1445,6 @@ __BUILD_CSR_OP(tlbidx)
#define EXCCODE_INT_START 64
#define EXCCODE_INT_END (EXCCODE_INT_START + EXCCODE_INT_NUM - 1)
-/* FPU register names */
-#define LOONGARCH_FCSR0 $r0
-#define LOONGARCH_FCSR1 $r1
-#define LOONGARCH_FCSR2 $r2
-#define LOONGARCH_FCSR3 $r3
-
/* FPU Status Register Values */
#define FPU_CSR_RSVD 0xe0e0fce0
@@ -1487,6 +1481,18 @@ __BUILD_CSR_OP(tlbidx)
#define FPU_CSR_RU 0x200 /* towards +Infinity */
#define FPU_CSR_RD 0x300 /* towards -Infinity */
+#ifdef CONFIG_CC_IS_CLANG
+#define LOONGARCH_FCSR0 0
+#define LOONGARCH_FCSR1 1
+#define LOONGARCH_FCSR2 2
+#define LOONGARCH_FCSR3 3
+#define read_fcsr(source) __movfcsr2gr(source)
+#define write_fcsr(dest, val) __movgr2fcsr(dest, val)
+#else /* CONFIG_CC_IS_CLANG */
+#define LOONGARCH_FCSR0 $r0
+#define LOONGARCH_FCSR1 $r1
+#define LOONGARCH_FCSR2 $r2
+#define LOONGARCH_FCSR3 $r3
#define read_fcsr(source) \
({ \
unsigned int __res; \
@@ -1503,5 +1509,6 @@ do { \
" movgr2fcsr "__stringify(dest)", %0 \n" \
: : "r" (val)); \
} while (0)
+#endif /* CONFIG_CC_IS_CLANG */
#endif /* _ASM_LOONGARCH_H */
--
2.40.0
