The AWK code was added to deduplicate modules.order in case $(obj-m)
contains the same module multiple times, but it is actually unneeded
since commit b2c885549122 ("kbuild: update modules.order only when
contained modules are updated").
The list is already deduplicated before being processed by AWK because
$^ is the deduplicated list of prerequisites.
(Please note the real-prereqs macro uses $^)
Yet, modules.order will contain duplication if two different Makefiles
build the same module:
foo/Makefile:
obj-m += bar/baz.o
foo/bar/Makefile:
obj-m += baz.o
However, the parallel builds cannot properly handle this case in the
first place. So, it is better to let it fail (as already done by
scripts/modules-check.sh).
Signed-off-by: Masahiro Yamada <masahiroy@xxxxxxxxxx>
---
Makefile | 5 +----
scripts/Makefile.build | 2 +-
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/Makefile b/Makefile
index d8ca0738b9e1..8add796953ad 100644
--- a/Makefile
+++ b/Makefile
@@ -1435,14 +1435,11 @@ endif
# Build modules
#
-# A module can be listed more than once in obj-m resulting in
-# duplicate lines in modules.order files. Those are removed
-# using awk while concatenating to the final file.
PHONY += modules
modules: $(if $(KBUILD_BUILTIN),vmlinux) modules_check modules_prepare
-cmd_modules_order = $(AWK) '!x[$$0]++' $(real-prereqs) > $@
+cmd_modules_order = cat $(real-prereqs) > $@
modules.order: $(subdir-modorder) FORCE
$(call if_changed,modules_order)
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 784f46d41959..0df488d0bbb0 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -374,7 +374,7 @@ $(obj)/built-in.a: $(real-obj-y) FORCE
cmd_modules_order = { $(foreach m, $(real-prereqs), \
$(if $(filter %/modules.order, $m), cat $m, echo $(patsubst %.o,%.ko,$m));) :; } \
- | $(AWK) '!x[$$0]++' - > $@
+ > $@
$(obj)/modules.order: $(obj-m) FORCE
$(call if_changed,modules_order)
--
2.34.1
