Masahiro Yamada <masahiroy@xxxxxxxxxx> writes:
> On Tue, Jul 27, 2021 at 5:27 AM Eric W. Biederman <ebiederm@xxxxxxxxxxxx> wrote:
>>
>> Masahiro Yamada <masahiroy@xxxxxxxxxx> writes:
>>
>> > On Wed, Jul 21, 2021 at 4:58 AM Arnd Bergmann <arnd@xxxxxxxxxx> wrote:
>> >>
>> >> On Tue, Jul 20, 2021 at 7:43 PM Linus Torvalds
>> >> <torvalds@xxxxxxxxxxxxxxxxxxxx> wrote:
>> >> > On Tue, Jul 20, 2021 at 1:05 AM Masahiro Yamada <masahiroy@xxxxxxxxxx> wrote:
>> >> >
>> >> > We do most of the other heavy lifting in this area in Kconfig anyway,
>> >> > why not add that compiler choice?
>> >> >
>> >> > Obviously it would be gated by the tests to see which compilers are
>> >> > _installed_ (and that they are valid versions), so that it doesn't ask
>> >> > stupid things ("do you want gcc or clang" when only one of them is
>> >> > installed and/or viable).
>> >>
>> >> I don't see a good way of making Kconfig options both select the
>> >> compiler and defining variables based on the compiler, since that
>> >> would mean teaching Kconfig about re-evaluating all compiler
>> >> dependent settings whenever the first option changes.
>> >>
>> >> I do have another idea that I think would work though.
>> >>
>> >> > Hmm? So then any "LLVM=1" thing would be about the "make config"
>> >> > stage, not the actual build stage.
>> >> >
>> >> > (It has annoyed me for years that if you want to cross-compile, you
>> >> > first have to do "make ARCH=xyz config" and then remember to do "make
>> >> > ARCH=xyz" for the build too, but I cross-compile so seldom that I've
>> >> > never really cared).
>> >>
>> >> The best thing that I have come up with is a pre-configure step, where
>> >> an object tree gets seeded with a makefile fragment that gets included
>> >> for any 'make' invocation. This would set 'ARCH=', 'CROSS_COMPILE',
>> >> 'CC=' and possibly any other option that gets passed to 'make' as
>> >> a variable and has to exist before calling 'make *config'.
>> >
>> >
>> > There is no need to add a hook to include such makefile fragment(s).
>> >
>> > Quite opposite, you can put your Makefile (in a different filename)
>> > that includes the top Makefile.
>> >
>> >
>> > I think this is what people are already doing:
>> >
>> >
>> > GNU Make looks for 'GNUmakefile', 'makefile', and 'Makefile'
>> > in this order.
>> >
>> >
>> > So, you can put 'GNUmakefile' with your favorite setups.
>> >
>> >
>> > $ cat GNUmakefile
>> > ARCH=arm64
>> > CROSS_COMPILE=aarch64-linux-gnu-
>> > CC=clang
>> > include Makefile
>>
>> Very weird.
>>
>> I just tested this and it does not work.
>> I did this:
>>
>> $ cat GNUmakefile
>> ARCH = alpha
>> CROSS_COMPILE = $(arch-prefix alpha)
>> include Makefile
>>
>> In one of my build directories and the main makefile simply does not see
>> the value of ARCH or CROSS_COMPILE I set. I have confirmed that my
>> GNUmakefile is being read, because everything breaks if I remove the
>> include line.
>>
>> Does anyone have any ideas?
>>
>> Something so we don't have to specify all of these variables on the make
>> command line would be nice.
>>
>> Eric
>
>
> Worked for me.
>
> Could you tell me the exact steps you did?
>
>
> This is my case:
>
> My kernel source tree is located at $HOME/ref/linux
> alpha tool chains are located at $HOME/tools/alpha-10.1.0/bin
>
>
>
> I tried a simple GNUmakefile with 3 lines.
>
> You can see 'make' is building the alpha kernel
>
>
> Please see below:
Interesting. That appears to work if I don't specify a build directory.
Once I specify a build directory with O= it does not work.
When I am working on a change that affects multiple architectures
I really want a build directory that is not my source tree so I can
test small changes on multiple architectures without needing to rebuild
everything.
Eric
